1. Field of the Invention
The present invention relates to a PLL (phase-locked loop) frequency synthesizer with a loop filter of variable bandwidth.
2. Description of the Prior Art
This type of PLL frequency synthesizer is hitherto constructed, for example, as shown in the U.S. Pat. No. 3,909,735. This prior art comprises a loop filter with a broad bandwidth and a loop filter with a narrow bandwidth. When changing over the frequency, first the loop filter of a broad bandwidth is selected, and finally it is changed to the loop filter with a narrow bandwidth. However, since the changeover time of frequency depends greatly on the stabilizing time of output voltage of the loop filter with a narrow bandwidth, it is not suited basically to very fast frequency changeover. Besides, there is a difference in the output voltage of the individual loop filters, it is necessary to control to prevent large fluctuations of the frequency due to sudden application of the differential voltage to the input terminal of the VCO (voltage controlled oscillator) at the time of changeover. Accordingly, in addition to the two loop filters, a circuit for suppressing fluctuations at the time of changeover is needed, and the entire circuit scale becomes large.